Introbotics Corporation
Albuquerque, NM
Abstract

The need for an automated methodology
for controlled impedance testing of Printed Wiring
Boards (PWBs) is significant and growing. Several
factors define this need and include: the volume of
boards having interconnects where impedance must be
controlled and thus tested, the need to test "on-board"
rather than relying on coupons, and tighter tolerance
requirements on controlled impedance specifications.
These issues are prompting manufacturers to explore new
means for meeting their testing requirements.
This paper attempts to clarify the
issues surrounding production level controlled impedance
testing and provide information contrasting several
different methodologies.
Introduction

The speed of electronic circuits has
increased by a factor of ten in the last five years for
a wide range of consumer products from children's toys,
which contain digital chips, to high-speed computer
systems. Important examples include high-speed memory
bus systems (Rambus and DDR), and communication
architectures such as Firewire and USB 2.0. These
examples point to a strong industry wide movement to
high-speed communications in digital electronic circuits
and demands the use of high speed interconnects on the
Printed Wiring Boards (PWB) that provide the foundation
for these circuits.
Digital signals with fast transition
times act like radio signals and passive circuit
components, such as traces on circuit boards, become
miniature "transmission antennas". A large number of
circuit components, occupying very small areas, act like
transmitting and receiving antennas and create distorted
signals that interfere with the operation of the digital
circuit. There are thousands of digital signals that can
be corrupted causing the electronic circuit to stop
working intermittently or permanently. An important
technique to avoid this increasingly serious problem is
to consider transmission line effects in the design of
the PWB and to test PWB's to verify proper impedance
control.
There are three (3) different types
of test equipment that can be used to determine the
impedance of a PWB trace.
An LCR meter can be used to take
inductance and capacitive values directly in a typical
four-wire measurement process. The disadvantage of this
process is that the LCR meters operates at a frequency
under 200 MHz which may not simulate operational
frequencies. Additionally this method requires shorting
of traces to gather all the measurement information, a
procedure that is not practical in a production
environment.
An alternative instrument is a
Network Analyzer that has the advantage of being able to
sweep a range of frequencies during the testing process.
The disadvantages are an increased level of
instrumentation cost and a high level of equipment
sophistication.
The test method of choice for the PWB
industry continues to be Time Domain Reflectometry (TDR).
TDR measures the signal reflections that result from a
generated signal traveling through PWB interconnects.
The TDR instrument sends a fast transition pulse through
the trace and compares the reflections from that unknown
trace structure to those produced by a standard
impedance.
Testing Challenges

The
industry trend towards increased controlled impedance
testing with stricter requirements has produced many
challenges in a manufacturing environment. Manufacturers
can meet some of these challenges with the current hand
probing methodology, but it is by no means a complete
solution. As the industry moves forward it has become
clear that an alternative to the current test methods is
necessary to meet the growing list of customer
requirements.
Trends in Customer Requirements

Test Results Correlation: This is
an important requirement from at least two perspectives.
The buyer of printed wiring boards wants to be able to
match the test results with their incoming inspection
processes and large multi-facility manufacturers want to
provide their customers with consistent test results
across their facilities if product is to be supplied
from more than one facility.
On-board Testing: An increasing number of buyers are
requiring on-board testing for impedance. The concerns
about poor correlation between test coupons and actual
product traces is driving this requirement. It is taking
the form of measurement on embedded test traces within
the board (non-functional parts of the product, e.g.
Rambus DRIMM boards) or taking measurements directly on
product traces.
Differential Impedance: Differential signaling
schemes are become more prevalent in digital designs to
achieve higher noise immunity which is needed for high
speed signaling. Impedance testing of differential trace
pairs offers particular challenges. Typically, more
probe connections are required by the test system and a
more stringent calibration procedure is needed to assure
accurate results. There are also variations of
differential impedance measurement which may be required
including true differential (two test signals, one per
trace, with opposite polarities) and common mode
differential (two test signals, one per trace with the
same polarity).
Tighter Tolerance: The
manufacturing tolerances for impedance control are
tightening. In the past it was felt that a manufacturing
callout for impedance tolerance of +/-10% was not
problematic. The manufacturer would simply need to take
some additional care in selecting material and/or
controlling line widths. Today, tolerances are critical
and products will not function or will become unreliable
if board impedance is not tightly controlled. To that
end, impedance specifications are being lowered to +/-8%
or +/-5% and designs with lower impedance produce lower
absolute tolerance values (e.g., 28ohms +/-10% results
in a smaller numerical ohm tolerance of +/-2.8 ohms).
Thus testing systems must be more accurate.
More Data: Measurement and test
of the PWB trace impedance has been the most important
tool for monitoring the high frequency properties of a
board. Buyers are starting to require other measurements
such as propagation delay (or signal flight time).
Propagation delay can impact the ability of an assembled
board to function in designs with high speed data rates
and tight timing margins. Additionally, as new high
frequency materials are being introduced in board
fabrications, information about the dielectric (Er)
properties of the manufactured board is becoming
important to board designers. With a simple coupon
design an accurate TDR system can measure material Er
[1] and "effective Er" values can be obtained for the
material surrounding a measured trace in real product
[2].
Special Coupons: Board designers,
now more sensitive to impedance control issues within
the manufacturing process are starting to require the
measurement of special test coupons. These coupons may
have varying line lengths, different probe point
pitches/patterns and they may have requirements for
specific and additional placement of the coupons on the
manufactured panel. These requirements tend to increase
the cost and complexity of existing manual impedance
testing processes and increase the cost of board
fabrication.
Test at Various Frequencies: The
increased focus on impedance control has created a new
test trend of matching the TDR test frequency to the
operational signal frequency that the PWB will
experience once assembled. This requirement forces a
reduction in measurement resolution and accuracy of the
TDR test process but more closely simulates the
operational parameters. USB 2.0 is a good example with a
test frequency requirement equivalent to a TDR risetime
of 400 psec for differential tests. [3] The production
testing equipment must not only have programmability of
the testing frequency but must also have the bandwidth
to meet the all specified test frequency requirements.
Multiple Impedance Levels: New
digital designs with mixed high-speed device
technologies require more impedance levels on a board.
It is not uncommon to see impedances of 28, 53, 75, 110
ohms together on one board. This requires the production
measurement system to be flexible and accurate on a
range of impedance values.
Quantity of Test: Typical PWB
controlled impedance test specifications require testing
on one trace per board signal layer (on representative
traces on test coupons) and a sampling program of 1% to
10% of product manufactured. With multiple impedance
levels on each layer, test point counts per layer are
increasing. With the concern about impedance variations
over a product, the number of coupons and the number of
traces tested per panel will increase and with the
concern over the need for tighter tolerance control, the
number of products tested may increase to 100%.
Via Effects: As board designers
understand more about interconnect vias and how they
affect the high frequency properties of their signals,
there will be a greater demand for manufacturer control
over these structures. This will require higher
resolution impedance test equipment to be able to
discern the variations the manufacturing process has on
these trace components.

Figure 1 - TDR WaveForm Capture
Trends in Manufacturer’s
Requirements

Accuracy & Repeatability: The
accuracy and repeatability of impedance testing is
extremely important to the manufacturing operations. The
repeatability of the process affects the reliability of
the test data, credibility of the process, and the
ability to use testing for process correction. There are
many factors that can adversely affect the repeatability
of the current manual test methodology. These include:
 |
Operator to operator consistency
|
 |
Probe force variability
|
 |
Probe angle variability
|
 |
Probe placement accuracy
|
 |
Unidentified faults in probe and other measurement
system components causing inaccurate test readings
(i.e., static damage to TDR instrument, cable bends
and cracks, loose cables, worn probes, cracks in
probe, etc.) |
 |
Consistencies in test location (one end via or the
other of a trace) |
 |
Consistencies of the measurement zone (where the
average impedance is being taken along the length of
the trace) |
 |
Diligence in following calibration procedures
|
 |
Correlation of equipment (TDR instrument and
probes) from test station to test station |
 |
Use of varying calibration procedures to
accommodate varying impedance levels |
 |
Operator interactions with the device under test (DUT)
(i.e., touching board or trace during test, leaving
DUT on table when testing bottom microstrips). |
 |
Proper temperature and humidity control
|
Standardization: The need to
standardize on testing procedures is critical to ensure
a repeatable test process. IPC is making ongoing
contributions to this process through their work on
standard documents like IPC-2141 "Controlled Impedance
Circuit Boards and High Speed Logic Design" and IPC
TM-650 "Test Methods Manual". The National Institute for
Standard Technology (NIST) is also contributing in part
to the production of the current impedance standard, a
calibrated airline, as well as their research into other
impedance standards.

Figure 2 - Calibration Airline
Health problems: The current
manual procedure for hand probing of coupons and panels
for impedance testing is inherently a very repetitive
task which can produce injuries to operators.
Operator Retention: Because of
the tedious nature of hand probe testing, operators
often do not stay long in the production test area. This
creates a burden of frequent retraining and errors due
to the new operator learning curve.
Skill Level of Operator: The use
of manual probing techniques with TDR instrumentation
requires a certain level of operator expertise.
Operators need to make constant decisions on what
measurement zone to use, which end of the trace to test,
what probes to use, what calibration settings are
appropriate, when to calibrate, and where to probe when
special panels or coupon testing is required. This level
of expertise increases the cost and reduces the
availability of qualified operators.
Cost: The cost of applying manual
labor to impedance testing is high. The cost of
acquiring and maintaining individual test stations is
also high. As the volume of testing continues to
increase, the magnitude of this overhead cost will
increase and adversely affect the bottom line.
In Process Testing: The need for
in process checks of impedance is critical. As a higher
percentage of boards require impedance tests, the
potential for rejection at final test is greater and
more costly. In- process testing is only successful if
the checks do not add significant time to the
manufacturing process and if the process can be adjusted
for the observed variations.
Maintaining Equipment: All TDR
instrumentation is static sensitive and requires
installation in special environments and special
operator handling. Probes are also subject to excessive
wear due to the repetitive nature of their use and
direct operator involvement. Poorly maintained equipment
will result in poor test quality.
Automated Testing Solutions

The challenges of production level
testing of PWBs are extensive as discussed above.
However it is possible to meet most of these challenges
and overcome the limitations present with current manual
test techniques by utilizing an Automated Test Solutions

Figure 3 – Automated Impedance System
System Components

Precision Motion Devices:
The mechanization of the testing
procedure allows for the use of higher resolution
components such as the TDR instrumentation, the cable
assemblies connecting the probe to the instrumentation
and the probes themselves which in turn permits a higher
level of measurement accuracy. (Studies have
demonstrated that there can be up to 1 ohm of difference
in impedance test readings with probes having a long
ground lead - high inductance ground path [4])
Higher test resolution is achieved
through the improvement of signal rise and falltimes.
These values dictate both how short an impedance
discontinuity on a DUT can be before the test system
detects it and how short a DUT trace can be and still be
measured by the System. Test studies done on Rambus
CRIMM boards indicate that with a System rise time of 34
psec and fall time of 53 psec, that ½" long traces can
be accurately measured. [5] Better System resolution
also allows the gathering of realistic data of
propagation time, effective dielectric constant and the
effects of vias on overall trace impedance.
Time studies at several PWB
manufacturers report that typical times for controlled
impedance measurements on coupons with manual test
techniques is approximately 30 secs per test point. Time
studies on one automated System indicate testing times
from 2-5 secs per test point (independent of whether the
DUT was a coupon of panel) demonstrating a throughput
increase over manual techniques of 6-15 times.
The IPC has recently introduced an
updated electrical test data format standard. This
format contains a definition of impedance test criteria
and makes it possible for electrical test CAM software
to gather and then output the impedance test information
file required by the System. At least one electrical
tester CAM software supplier has already provided the
necessary interface and output to allow creation of
System test definition files.
The high cost of manual testing
techniques including labor, equipment maintenance,
facility overhead, and lost production conservatively
permit a payback for an automated tester system of under
a year.
There are significant challenges that
PWB manufacturers face to meet the current and growing
demands for high frequency testing of their products. As
in the past where automated systems were developed to
handle the growing need for traditional open and short
circuit testing, automated systems are now available and
being developed to meet the new requirements. The
advantages of an automated system over the conventional
manual probing techniques are great and include
significant cost savings and throughput improvement.
Once again, automation has provided a solution to meet
increasing PWB production test requirements.
[1], [4] Intel Corporation, Printed
Circuit Board (PCB) Test Methodology, Revision 1.6,
January 2000
[2] Mike Tranchmontange, "Utilizing
TDR to Measure Dielectric Constant, Er", Tektronix
Application Note, Circa 1997
[3] Compaq, HP, Intel, etc.,
"Universal Serial Bus Specification Rev 2.0", April 2000